The present invention relates to a semiconductor device and a method of manufacturing the same and, more particularly, to a planar type semiconductor device having a high breakdown voltage.
As is known, in a p-n junction diode as one of planar type semiconductor devices, a semiconductive film having a dangling bond density of about 5.times.10.sup.17 cm.sup.-3 is formed on the surface of an n-type semiconductor substrate between a p-type diffusion layer (anode) selectively formed on the substrate surface and an n.sup.+ -type diffusion layer (channel stopper) formed to surround the anode at an interval, thereby improving the breakdown voltage of the device.
With this structure, when the trapping level in the semiconductive film is populated with carriers, the interface between the semiconductive film and the semiconductor substrate stabilizes to smoothly spread the depletion layer.
In the above structure, however, the interface between the semiconductive film and the semiconductor substrate is unstable until the trapping level in the semiconductive film is populated with carriers. For this reason, when the device is suddenly reverse-biased (dV/dt:large), a leakage current (TVLC:Transient voltage Leaking Current) undesirably flows.
The speed at which the trapping level is populated with carriers depends on hopping conduction which takes place via a few discrete levels in the band gap of the semiconductive film. Therefore, as the discrete levels in the band gap approach a continuum the speed increases.
However, in the conventional semiconductive film using helium-based silane, a time of roughly 250 .mu.s is required to populate the trapping level with carriers. Therefore, the TVLC flows until 250 .mu.s elapse after application of the reverse-bias voltage (FIG. 1).